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Technical Architecture Overview

This section details the software engineering and high-performance computing (HPC) architecture of the Plant-Herbivore Interaction & Defense Simulator (PHIDS).

Core Chapters

  • System Architecture: High-level system topology, Entity-Component-System (ECS) data arrays, double-buffering invariants, and FastAPI/HTMX service integration.
  • Engine Execution: Sequential loop phases (FlowField \(\to\) Lifecycle \(\to\) Interaction \(\to\) Signaling \(\to\) Telemetry), Numba @njit JIT optimization rules, and spatial hashing.
  • Interfaces & UI: Dynamic HTMX web dashboard, Jinja2 template rendering, real-time Canvas 2D/3D map visualizer, and scenario hot-reloading via DraftService.
  • Telemetry: Zarr replay buffer serialization, deterministic PRNG seed recording, zero-copy matrix playback, and Polars analytical export pipelines.
  • Testing Architecture: Comprehensive testing framework featuring unit, integration, mutation (mutmut), and performance benchmark (pytest-benchmark) regression gates.

Future Prospects

  • GPU CUDA Acceleration Engine: Architecture for offloading 2D/3D reaction-diffusion PDE stencil solvers and airborne VOC advection to PyTorch and CUDA C++ GPU kernels.